This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2002-287364, filed Sep. 30, 2002, the entire contents of which are incorporated herein by reference.
1. Field of the Invention
The present invention relates to a semiconductor device having a plug formed in a through-hole extending through a semiconductor substrate and a method of manufacturing the semiconductor device.
2. Description of the Related Art
In recent years, a large-scale integrated circuit chip prepared by integrating a large number of transistors, resistors, capacitors, etc., on a semiconductor substrate in a manner to form an electric circuit is used as an important part of computers or communication equipment. Therefore, the performance of the entire equipment is greatly dependent on the performance of the chip.
On the other hand, also proposed is a so-called multi-chip semiconductor device using a plurality of chips for improving the performance of the entire equipment. In recent years, proposed as a multi-chip semiconductor device is the technology described below. Specifically, a semiconductor chip is provided with a connecting plug made of a conductive material and formed in a through-hole extending through an interlayer insulating film and a semiconductor substrate. The semiconductor chip is electrically connected to another semiconductor chip by using the connecting plug noted above.
FIG. 7 is a cross-sectional view showing the construction of a conventional semiconductor chip provided with the connecting plug noted above. In the semiconductor chip shown in FIG. 7, an actual through-hole 101 is generally formed by a reactive ion etching method (RIE). In this case, the sidewall of the through-hole 101 is generally formed forward tapered shape as shown in FIG. 7. It has been found, however, that, in a connecting plug 103 formed by using the through-hole 101 whose sidewall is formed forward tapered shape, a crack or peel is generated in connecting portions 104, 105 of the connecting plug 103 with upper and lower barrier metal layers 18, 19, respectively and, thus, a defective connection tends to take place. Incidentally, FIG. 7 also shows a multi-layered wiring layer 12, a protective insulating layer 17, a pad 20 and a sidewall insulating film 102.
What should be noted is that various kinds of stress are generated by the differences in, for example, the thermal expansion coefficient, the brittleness and Young""s modulus between the chip material such as Si, quartz or various resins in the case of a substrate and the connecting plug buried in the through-hole 101. It has been found that, where the stress is generated, a crack tends to take place in, particularly, a corner 104 on the back surface of the semiconductor chip so as to bring about a defective electrical connection. It has also been found that a defective electrical connection also takes place in a corner 105 on the upper portion.
As described above, when it comes to a semiconductor chip provided with a connecting plug formed in a through-hole formed forward tapered shape and extending through a substrate, a serious problem is generated that a defective electrical connection is brought about by the stress exerted between the plug and the electrode formed on the lower surface of the plug.
According to a first aspect of the present invention, there is provided a semiconductor device, comprising a semiconductor substrate having semiconductor elements integrally formed therein, a wiring layer formed on the surface of the semiconductor substrate, and a conductive connecting plug formed in a through-hole extending through the semiconductor substrate, wherein the upper and lower surfaces of the connecting plug are parallel to the upper surface of the semiconductor substrate, and the connecting plug has a region whose cross section parallel to the upper surface of the semiconductor substrate has an area smaller than the area of each of the upper and lower surfaces of the connecting plug.
According to a second aspect of the present invention, there is provided a semiconductor device, comprising a semiconductor substrate having semiconductor elements integrally formed therein, a wiring layer formed on the surface of the semiconductor substrate, a conductive connecting plug formed in a through-hole extending through the semiconductor substrate, and a first conductive layer formed on the connecting plug on the side of the back surface of the semiconductor substrate, wherein an interface between the connecting plug and the first conductive layer forms an acute angle with the side surface of the connecting plug connected to the interface between the connecting plug and the first conductive layer.
According to a third aspect of the present invention, there is provided a semiconductor device having a plurality of semiconductor chips stacked one upon the other, wherein at least one of the semiconductor chips comprises a semiconductor substrate having semiconductor elements integrally formed therein, a wiring layer formed on the surface of the semiconductor substrate, and a conductive connecting plug formed in a through-hole extending through the semiconductor substrate, and wherein the upper and lower surfaces of the connecting plug are parallel to the upper surface of the semiconductor substrate, and the connecting plug has a region whose cross section parallel to the upper surface of the semiconductor substrate has an area smaller than the area of each of the upper and lower surfaces of the connecting plug.
According to a fourth aspect of the present invention, there is provided a semiconductor device having a plurality of semiconductor chips stacked one upon the other, wherein at least one of the semiconductor chips comprises a semiconductor substrate having semiconductor elements integrally formed therein, a wiring layer formed on the surface of the semiconductor substrate, a conductive connecting plug formed in a through-hole extending through the semiconductor substrate, and a first conductive layer formed on the connecting plug on the side of the back surface of the semiconductor substrate, and wherein an interface between the connecting plug and the first conductive layer forms an acute angle with the side surface of the connecting plug connected to the interface between the connecting plug and the first conductive layer.
Further, according to a fifth aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising selectively etching a semiconductor substrate from the side of the front surface so as to form a first hole having a sidewall forward tapered; forming a second hole connected to the lower portion of the first hole and having a sidewall inverse tapered in the portion connected to the first hole; burying a conductive material in the first and second holes; and exposing the buried conductive material to the back surface of the semiconductor substrate so as to form a connecting plug made of the conductive material and extending through the semiconductor substrate.